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Tuesday 29 April, 2025
Codasip Prime comprises pre-silicon hardware and software development kits to realize state-of-the-art memory-safe compute
Munich, Germany, 29 April 2025–Codasip®, the European RISC-V leader, has made available an exploration platform based on the Codasip X730 application core, which integrates CHERI (Capability Hardware Enhanced RISC Instructions…
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Codasip launches complete exploration platform to accelerate CHERI adoption
Tuesday 29 April, 2025 Codasip Prime comprises pre-silicon hardware and software development kits to realize state-of-the-art memory-safe compute Munich, Germany, 29 April 2025–Codasip®, the European RISC-V leader, has made available an exploration platform based on the Codasip X730 application core, which integrates CHERI (Capability Hardware Enhanced RISC Instructions…